Faculty Members


Professor IWATA Makoto

Ph.D, Osaka University, Japan, 1997
Year of birth Gender Male
Affiliation School of Information
Information Systems Engineering Course, Department of Engineering, Graduate School of Enginering
Research Center for Brain Communication, Research Institute
Computing Support Department

Job titles Head, Research Center for Brain Communication
Director, Computing Support Department
Head of Academic Research, Research Department
Personal web site

Areas of specialization Computer Architecture
Development Methodology of Information and Communication Systems
Laboratory/research office Advanced Computer Engineering Laboratory
The academic objective of our work on advanced information and communication systems is to investigate novel computer engineering approaches through empirical study of LSI chip fabrication. The data-oriented parallel computing technique and its self-timed pipeline implementation have been developed and applied in various embedded application systems in order to achieve higher performance, lower power consumption, and higher dependability for the coming Internet of Things (IoT) based big-data era. In the future our studies will be extended to research on brain-like computer organization.
Current reseach topics Low-Power Parallel Computers: Data-Driven multiprocessors Consumer Applications of VLSI Computers Interdisciplinary Study of Neuro Science and Computer Science
Educational background 1988: Master, Osaka University
1986: Bachelor, Osaka University
Professional background 2008-2008: Visiting Researcher, UC Irvine
2006-2010: Visiting Professor, Research Institute of Electrical Communication, Tohoku University
2002-2006: Visiting Associate Professor, Research Institute of Electrical Communication, Tohoku University
2002-: Professor, Kochi University of Technology
1997-2001: Associate Professor, Kochi University of Technology
1991-1997: Assistant Professor, Graduate School of Engineering, Osaka University
Academic societies The Institutes of Electronics, Information, and Communication Engineers
Information Processing Society of Japan
Virtual Reality Society of Japan

Courses  * Courses provided in English are shown with (E) mark

Undergraduate school ▼

Guide to the School of Information
Seminars on the School of Information
Project Research 1
Project Research 2
Project Research 3
Computer Architectures

Graduate school ▼

Individual Work for Graduate
Seminar 3
Seminar 4
Advanced Seminar 1
Advanced Seminar 2

Research activities

Research papers ▼

  1. Authors: Kazuhiro Komatsu, Shuji Sannomiya, Makoto Iwata, Hiroaki Terada, Suguru Kameda, Kazuo Tsubouchi
    Title: ”Interacting Self-Timed Pipelines and Elementary Coupling Control Modules”
    Journal:  IEICE Trans. Fundamentals, Vol. E92-A, No. 7
    Year: 2009
  2. Authors: Ruhui Zhang, Makoto Iwata
    Title: ”An Efficient Signature Matching Scheme for Mobile Security”
    Journal: IEICE Trans. on Communications, Vol. E91-B, No. 10, pp. 3251-3261
    Year: 2008
  3. Authors: Daichi Morikawa, Makoto Iwata, Hiroaki Terada
    Title: Super-Pipelined Implementation of IP Packet Classification
    Journal: Journal of Intelligent Automation and Soft Computing, Vol. 10, No. 2, pp. 175-184
    Year: 2004
  4. Authors: Makoto Iwata, Michihiro Ogura, Yuko Ohishi, Hideaki Hayashi, Hiroaki Terada
    Title: 100 Mpps Fully Self-Timed Priority Queue: FQ
    Journal: Proc. of International Solid State Circuits Conference, Vol. 8-1
    Year: 2004
  5. Authors: Hiroaki Terada, Souichi Miyata, Makoto Iwata
    Title: DDMP's: Self-Timed Super-Pipelined Data-Driven Processors
    Journal: Proceedings of the IEEE, Vol. 87, No. 2, pp. 282-296
    Year: 1999

Keynote lectures ▼

Invited lectures ▼

Notable projects ▼

Awards ▼

  1. IEICE Communications Society Excellent Paper Award, Communications Society, IEICE, 2014

Patents ▼

Grants-in-Aid for Scientific Research from the Japanese government ▼

Competitive research funds ▼

Social activities

Committee roles ▼

Published books ▼