Faculty Members

Professor
IWATA Makoto

Ph.D, Osaka University, Japan, 1997

Gender: Male
Job titles:

- Vice President
- Director, Research Department
- Director, Risk Management Department
Affiliation:

- School of Informatics
- Informatics Course, Department of Engineering, Graduate School of Enginering
- Research Institute
- Risk Management Department
Personal web site: http://www.info.kochi-tech.ac.jp/iwata/
researchmap： https://researchmap.jp/read0063684
Article from the "Cutting-edge Research and Social Contribution"：
https://www.kochi-tech.ac.jp/english/power/research/making_the_information_society_sustainable_with_outstanding_power-saving_technology.html

Areas of specialization	Computer Architecture Development Methodology of Information and Communication Systems
Laboratory/research office	Advanced Computer Engineering Laboratory Our academic objective on advanced information and communication systems is to investigate novel computer engineering through empirical study of LSI chip fabrications. The data-oriented parallel computing techniques and its self-timed pipeline implementation have been proposed and applied to various embedded application systems in order to achieve higher performance, lower power, and higher dependability for future IoT (Internet of Things)-based big-data era. These studies will be extended to brain-like computer organization in future.
Current research topics	Low-Power Parallel Computers: Data-Driven multiprocessors Consumer Applications of VLSI Computers Interdisciplinary Study of Neuro Science and Computer Science
Educational background	1988: Master, Osaka University 1986: Bachelor, Osaka University
Professional background	2008: Visiting Researcher, UC Irvine 2006-2010: Visiting Professor, Research Institute of Electrical Communication, Tohoku University 2002-2006: Visiting Associate Professor, Research Institute of Electrical Communication, Tohoku University 2002-: Professor, Kochi University of Technology 1997-2001: Associate Professor, Kochi University of Technology 1991-1997: Assistant Professor, Graduate School of Engineering, Osaka University
Licenses
Academic societies	The Institutes of Electronics, Information, and Communication Engineers Information Processing Society of Japan Virtual Reality Society of Japan

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Courses

* Courses provided in English are shown with (E) mark

Undergraduate school	Introduction to Information Systems Computer Architectures Seminars on the School of Information Graduation Thesis Project Research 1 Project Research 2 Project Research 3
Graduate school	Embedded Computing System Design Seminar on Infomatics I Seminar on Infomatics II Individual Work for Graduate Advanced Seminar 1 Advanced Seminar 2

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Research activities

Research papers	Authors: Senri Yoshioka, Shuji Sannnomiya, Makoto Iwata, Hiroaki Nishikawa Title: EDA-oriented FPGA Circuit Design Method for Four-phase Bundled-data Circular Self-timed Pipeline Journal: Journal of Information Processing, Vol. 31, pp. 495-508, Information Processing Society of Japan Year: 2023 Authors: Zhang Zhen, Xiaoyan Yu, Xianwei Rong, Makoto Iwata Title: A Novel Multimodule Neural Network for EEG Denoising Journal: IEEE Access, Vol. 10, pp. 49528-49541, Institute of Electrical and Electronics Engineers ({IEEE}) Year: 2022 Authors: Zhang Zhen, Xiaoyan Yu, Xianwei Rong, Makoto Iwata Title: Spatial-Temporal Neural Network for P300 Detection Journal: IEEE Access, Vol. 9, IEEE Year: 2021 Authors: Kimura T., Kadota H., Kuroda T., Funai T.D., Makoto Iwata, Kochiyama T., Miyazaki M. Title: Neural correlates of tactile simultaneity judgement: a functional magnetic resonance imaging study Journal: Scientific Reports, pp. 1-13 Year: 2019 Authors: Naruhito Hironaga, Takahiro Kimura, Takako Mitsudo, Atsuko Gunji, Makoto Iwata Title: Proposal for an accurate TMS-MRI co-registration process via 3D laser scanning Journal: Neuroscience Research, Vol. 144, pp. 30-39, Elsevier Year: 2019 Authors: Kazunori Ueda, Makoto Iwata, Ken-ichi Baba, Shinji Shimojo Title: Multi-overlay information management for IoT-oriented P2P network applications Journal: International Journal of Space-Based and Situated Computing, Vol. 8, No. 4, pp. 204-213, Inderscience Enterprises Ltd. Year: 2019 Authors: Kazuo Tsubouchi, Fumiyuki Adachi, Suguru Kameda, Mizuki Motoyoshi, Akinori Taira, Noriharu Suematsu, Tadashi Takagi, Hiroshi Oguma, Minoru Fujishima, Ryuji Inagaki, Masaomi Tsuru, Eiji Taniguchi, Hiroshi Fukumoto, Akira Matsuzawa, Masaya Miyahara, Makoto Iwata, Fumihiro Yamagata, Noboru Izuka Title: Connectivity in Wireless Telecommunication Journal: VLSI Design and Test for Systems Dependability, pp. 245-324, Springer Year: 2019 Authors: UEDA Kazunori, IWATA Makoto, BABA Ken-ichi, SHIMOJO Shinji Title: Mass-User Satisfaction for NFV-Based Application Specific Network Journal: International Journal of Computer Science and Network Security, Vol. 16, No. 9, pp. 55-60 Year: 2016 Authors: Kazuhiro Komatsu, Shuji Sannomiya, Makoto Iwata, Hiroaki Terada, Suguru Kameda, Kazuo Tsubouchi Title: ”Interacting Self-Timed Pipelines and Elementary Coupling Control Modules” Journal: IEICE Trans. Fundamentals, Vol. E92-A, No. 7 Year: 2009 Authors: Ruhui Zhang, Makoto Iwata Title: ”An Efficient Signature Matching Scheme for Mobile Security” Journal: IEICE Trans. on Communications, Vol. E91-B, No. 10, pp. 3251-3261 Year: 2008 Authors: Makoto Iwata, Michihiro Ogura, Yuko Ohishi, Hideaki Hayashi, Hiroaki Terada Title: 100 Mpps Fully Self-Timed Priority Queue: FQ Journal: Proc. of International Solid State Circuits Conference, Vol. 8-1 Year: 2004 Authors: Daichi Morikawa, Makoto Iwata, Hiroaki Terada Title: Super-Pipelined Implementation of IP Packet Classification Journal: Journal of Intelligent Automation and Soft Computing, Vol. 10, No. 2, pp. 175-184 Year: 2004 Authors: Hiroaki Terada, Souichi Miyata, Makoto Iwata Title: DDMP's: Self-Timed Super-Pipelined Data-Driven Processors Journal: Proceedings of the IEEE, Vol. 87, No. 2, pp. 282-296 Year: 1999
Awards	Achievement Award, The 2017 World Congress in Computer Science Computer Engineering & Applied Computing (CSCE'17), The 2017 World Congress in Computer Science Computer Engineering & Applied Computing (CSCE'17), 2017 IEICE Communications Society Excellent Paper Award, Communications Society, IEICE, 2014
Grants-in-Aid for Scientific Research from the Japanese government	Project title: Heterogeneous Wireless Communication Processor Based on Low-Power Self-Timed Circuits Category: Grant-in-Aid for Scientific Research (C) Project number: 16K00082 Project period: 2016-2018 Total budget amount: 4,420,000 yen Keywords:

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Social activities

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